As is known, memory cells are presently read by converting the current flowing into the cell, which is suitably biased, into a voltage, and comparing the voltage thus obtained with a reference voltage generated from a reference cell, the charge state of which is previously known, and is typically a virgin cell. In fact, the read memory cell conducts a different current according to the stored charge condition, and comparison (carried out by a sense amplifier) with the current flowing in the reference cell allows detecting whether the cell is written or erased, and thus whether the stored datum is a "0" or a "1".
FIG. 1 shows a simplified diagram of a reading device (sense amplifier) 1 connected to an array cell 2 to be read, and to a reference cell 3. Sense amplifier 1 comprises a circuit 4 preventing phenomena of soft-writing (spurious writing of the cell), a current-voltage converter 5 and a comparator 6.
Cell read correctness therefore depends to a large extent on the satisfactory operation of the reference cell.
At present in EPROM memories, reference cells are formed inside the memory array, using a column of the array as a reference, one for each output. This solution has some advantages, such as low dispersion of the threshold values of the reference cells compared with the values of the memory cells; simplicity of timing, since the reference cells are biased together with the memory cells; and balance of the branches of the sense amplifier.
However, this solution cannot be applied to flash-type memories, in which it is necessary for the reference cells to have a ground separated from that of the memory cells, to prevent the reference cells from becoming depleted (i.e., overerased) during memory cell erasing (which takes place in sectors). In addition, in flash-type memories, the arrangement of the reference cells inside the memory array would cause stresses for the reference cells themselves, such as to cause cycling problems and to prevent modification of the reference threshold if necessary during the test step, owing to the large number of reference cells. Consequently, in flash memories, the reference cells are gathered in a small array arranged outside the memory array. Thereby, the reference cells can be erased and/or written during the test step, to obtain the best reference possible, which nevertheless is the same for all the sense amplifiers.
In addition, a feature which is essential to obtain correct reading of the memory cells concerns positioning of the characteristic of the reference cell (reference characteristic), compared with the characteristics of written and erased memory cells, taking into account their distribution. In particular, with reference to FIG. 2, the position of the reference characteristic must be intermediate between the characteristic of the worst erased array cell (curve I.sub.E, with threshold Vtc) and the characteristic of the worst programmed cell (curve I.sub.w, with threshold Vts). To this end, known I/V converters are structured according to two solutions, i.e., unbalance converter, which provides the reference characteristic R.sub.1 of FIG. 2, and semi-parallel converter which provides the reference characteristic R.sub.2 of FIG. 3.
The two solutions have different fields of application; the first, of FIG. 2, is suitable for memories operating at high supply levels (5V); the second, of FIG. 3, is suitable for memories operating at a low voltage (less than 3V).
In these converters, the main problems are derived from the need to correctly position the reference, and to select accurately the gain of the trans-characteristic of the cell (gain seen externally), by modifying loads of the I/V converter 5. In fact these operations are very delicate and costly as to time; in addition, the reference cell (or plurality of reference cells) is not representative of the entire distribution of the array cells, and thus gives rise to a response distribution by the sense amplifier. Finally, the reference cells do not age like the array cells because they are subject to different stresses, they do not undergo the same program/erase cycles as the array cells, and on the other hand they are biased substantially continually during reading.
Consequently, design and control of the reference cells is difficult and complex.